Main Responsibilities
- Building up the RTL design and design verification team starting from finding well-qualified semiconductor design/verification engineers
- High performance energy-efficient SOC architecture design
- CPU subsystem architecture design
- Coherent backbone & local bus architecture design
- Clock/power/reset architecture design
- Memory subsystem design
- Image processing (acquisition/ compression/ display/ understanding) architecture design
- Camera I/F, ISP, codec, DisplayPort/ HDMI, NPU/ GPU/ DSP subsystem
- High speed communication subsystem architecture design
- UFS/eMMC, PCIe, etc.
- Legacy interface IP subsystem design
- UART, SPI, I2C, etc.
- IP / SOC block design, and full chip integration
- IP configuration and generation for ARM based SOC
- System IP (CMU, PMU, DFTMUX, etc.) and some peripheral IP design such as DMA.
- IP-XACT based fullchip/block integration
- Sanity check (Simulation, Lint, CDC, DFT)
- Physical implementation support (SDC script)
- SOC design verification
- Review the specifications and architecture
- Extract features and define verification plan
- Execute on this plan through test bench development, test generation, failure analysis, and coverage analysis/closure.
- RTL and gate level simulation
- Design verification methodology and flow implementation and improvement
Career Qualifications
- 10+ years of experience in related work (SOC architecting, design and verification)
- Understanding SOC design flow and methodology
- Experience on high performance low power SOC design and implementation
Required skills
- Good understanding of SOC specifications, architecture, and how to implement high performance energy efficient SOC
- Capability to extract the design features and define the verification plan
- Failure analysis and decision making
- Project schedule management
Preferred Qualifications
- Functional safety design experience for automotive SOCs
- Good understanding of how to co-design software and hardware.
- Domain knowledge for CPU, coherent/noncoherent cache system, SOC bus, DRAM controller, accelerators (NPU, GPU, DSP), multimedia and display IP (ISP, video codec, HDMI/DP)
- Experience of physical design as well as logical design for big SOC
Preferred Character
- Encouraging team members to be motivated with good coaching skills to accomplish their work
- Good at 1:1 communications with team members knowing what are their personal interests and what are their concerns to build up good relationship
- Facilitating collaboration within and across teams to root-cause and debug issues
- Good decision-making skill respecting team members’ opinions
- Good communication skill to collaborate with HW/SW development teams in HQ