- Understand the requirements & the functional description of the device to ensure compliance with specifications and error-free functionality.
- Develop a digital circuit with System Verilog/Verilog for a new design or update the functions of an existing design of the circuit.
- Create a detailed block design using System Verilog/Verilog from functional requirement, evolve design specification and perform RTL coding, Lint checking.
- Create and execute a verification plan, including verification testbench/patterns/models/System Verilog Assertions (SVAs).
- Develop SVA properties for assertion, assumption and cover statement.
- Debug failures, fix testbench/model/checker issues, analyze and close coverage.
- Write scripts for automation of flow.
- Work with Analog team members to bring-up Chip/System level verification.
- Participate in post-silicon bring-up, validation and compliance testing.
- Bachelor’s or Graduate Degree in: Computer Sciences, Electrical, or Computer Engineering.
- Have at least 2-5 years of proven experience
- Experience with Hardware Descriptive Languages (HDL) such as System Verilog, Verilog or VHDL is required.
- Understand digital hardware architectures and logic (State-machines, RAMs, Registers and bus architectures such as SPI or I2C).
- Must be self-driven & proactive with a desire to understand, learn more, do more.
- Excellent analytical and debugging skills with the ability to proactively solve issues is required.
- Verbal and written communication skills in English.
- Good understanding of ASIC design and verification methodologies/flows is a plus.
- Knowledge of verification methodologies such as UVM is a plus.
- The ability to work in a Linux shell environment and Linux scripting (CSH/TCL/Perl/Python) is a plus.
- Experience with silicon debugging which includes logic and Analog Blocks working together is a plus