Work Location: Major cities in Japan (e.g., Tokyo, Osaka)

Training will be provided in HCMC

Job Description:

• Logic design and verification

• FPGA/LSI design

• Develop RTL code using Verilog/SystemVerilog

Job Requirements:

• Expected to graduate in 2025 with a major in Electronics or a related field

• Recent graduates with 1–2 years of work experience are also encouraged to apply

• Interested in logic design and motivated to work in Japan long-term

• Able to communicate in everyday English

Preferred Skills & Experience:

• Basic understanding of Japanese

• Basic knowledge of digital circuit design

Compensation & Benefits:

• Salary and social insurance equivalent to Japanese employees

Training Program:

• Before graduation: Online training available

• After graduation: Full-time training in Japanese language and technical skills